2023

• Lukas Vogel, Daniel Ritter, Danica Porobic, Pınar Tözün, Tianzheng Wang, Alberto Lerner: “Data Pipes: Declarative Control over Data Movement” (13th Annual Conference on Innovative Data Systems Research, Conference on Innovative Data Systems Research, CIDR 23)
• Ehsan Yousefzadeh-Asl-Miandoab, Ties Robroek, Pınar Tözün: “Profiling and Monitoring Deep Learning Training Tasks” (3rd International Workshop on Machine Learning and Systems, ACM – Association for Computing Machinery)
• Ties Robroek, Aaron Duane, Ehsan Yousefzadeh-Asl-Miandoab, Pınar Tözün: “Data Management and Visualization for Benchmarking Deep Learning Training Systems” (6th International Workshop on Data Management for End-to-End Machine Learning, ACM – Association for Computing Machinery)
• Andreas Geyer, Johannes Pietrzyk, Alexander Krause, Dirk Habich, Wolfgang Lehner, Christian Färber, Thomas Willhal: “Near to Far: An Evaluation of Disaggregated Memory for In-Memory Data Processing” (DIMES@SOSP2023)
• Dirk Habich, Alexander Krause, Johannes Pietrzyk, Christian Faerber, Wolfgang Lehner: “Simplicity done right for SIMDified query processing on CPU and FPGA” (ACM SIGMOD/PODS)
• Francieli Boito, Jim Brandt, Valeria Cardellini, Philip Carns, Florina M. Ciorba, Hilary Egan, Ahmed Eleliemy, Ann Gentile, Thomas Gruber, Jeff Hanson, Utz-Uwe Haus, Kevin Huck, Thomas Ilsche, Thomas Jakobsche, Terry Jones, Sven Karlsson, Abdullah Mueen, Michael Ott, Tapasya Patki, Krishnan Raghavan, Stephen Simms, Kathleen Shoga, Michael Showerman, Devesh Tiwari, Torsten Wilde, Ivy Peng, and Keiji Yamamot: “Autonomy Loops for Monitoring, Operational Data Analytics, Feedback, and Response in HPC Operations” HPCMASPA workshop at IEEE Cluster 2023)
• Aleš Zamuda: “Solving 100-Digit Challenge with Score 100 by Extended Running Time and Parallel Benchmarking” (Proceedings of the 17th International Symposium on Operational Research in Slovenia)
• Aleš Zamuda: “Computing in DAPHNE: Integrated Data Analysis Pipelines for Large-Scale Data Management, HPC and Machine Learning” (Austrian-Slovenian HPC Meeting 2023 – ASHPC23)
• Ahmed Eleliemy, Florina M. Ciorba: “DaphneSched: A Scheduler for Integrated Data Analysis Pipelines” (ISPDC23)
• Christoph Brücke, Philipp Härtling, Rodrigo D Escobar Palacios, Hamesh Patel, Tilmann Rabl: “TPCx-AI – An Industry Standard Benchmark for Artificial Intelligence and Machine Learning Systems” (VLDB23)
• Maximilian Böther, Lawrence Benson, Ana Klimovic, Tilmann Rabl: “Analyzing Vectorized Hash Tables Across CPU Architectures” (VLDB23)
• Fabian Mahling, Paul Rößler, Thomas Bodner, Tilmann Rabl: “BabelMR: A Polyglot Framework for Serverless MapReduce” (VLDBW – SDA 23)
• Lawrence Benson, Richard Ebeling, Tilmann Rabl: “Evaluating SIMD Compiler-Intrinsics for Database Systems” (VLDBW – ADMS23)
• Aleš Zamuda: “Generative AI Using HPC in Text Summarization and Energy Plants” (Austrian-Slovenian HPC Meeting 2023 – ASHPC23)
• Matthias Böhm, Florina M. Ciorba, and Ahmed Eleliemy: “An Open and Extensible System Infrastructure For Integrated Data Analysis Pipelines” (ISC High Performance 2023)
• Jonas H. Müller Korndörfer, Ahmed Eleliemy, Osman Seckin Simsek , Thomas Ilsche, Robert Schöne, Florina M. Ciorba: “How Do OS and Application Schedulers Interact? An Investigation with Multithreaded Applications” (Euro-Par 23, 29th International European Conference on Parallel and Distributed Computing )
• Niclas Hedam, Morten Tychsen Clausen, Philippe Bonnet, Sangjin Lee, Ken Friis Larsen: “Delilah: eBPF-offload on computational storage” (19th International Workshop on Data Management on New Hardware – DaMoN)
• Nils Strassenburg, Dominic Kupfer, Julia Kowal, Tilmann Rabl: “Efficient Multi-Model Management” (26th International Conference on Extending Database Technology – EDBT)
• Wang Yue, Lawrence Benson, Tilmann Rabl: “Desis: Efficient Window Aggregation in Decentralized Networks” (26th International Conference on Extending Database Technology – EDBT)
• Ivan Ilic, Ilin Tolovski, Tilmann Rabl: “RMG Sort: Radix-Partitioning-Based Multi-GPU Sorting” (Datenbanksysteme für Business, Technologie und Web, BTW 2023)
• Patrick Damme, Matthias Boehm: “Enabling Integrated Data Analysis Pipelines on Heterogeneous Hardware through Holistic Extensibility” (2nd Workshop on Novel Data Management Ideas on Heterogeneous Hardware Architectures (NoDMC))

2022

• Patrick Damme, Marius Birkenbach, Constantinos Bitsakos, Matthias Boehm, Philippe Bonnet, Florina Ciorba, Mark Dokter, Pawel Dowgiallo, Ahmed Eleliemy, Christian Faerber, Georgios Goumas, Dirk Habich, Niclas Hedam, Marlies Hofer, Wenjun Huang, Kevin Innerebner, Vasileios Karakostas, Roman Kern, Tomaž Kosar, Alexander Krause, Daniel Krems, Andreas Laber, Wolfgang Lehner, Eric Mier, Marcus Paradies, Bernhard Peischl, Gabrielle Poerwawinata, Stratos Psomadakis, Tilmann Rabl, Piotr Ratuszniak, Pedro Silva, Nikolai Skuppin, Andreas Starzacher, Benjamin Steinwender, Ilin Tolovski, Pınar Tözün, Wojciech Ulatowski, Aristotelis Vontzalidis, Yuanyuan Wang, Izajasz Wrosz, Aleš Zamuda, Ce Zhang, Xiao Xiang Zhu: “DAPHNE: An Open and Extensible System Infrastructure for Integrated Data Analysis Pipelines.” (Conference on Innovative Data Systems Research, CIDR, 2022) [Reproducibility Scripts for Daphne CIDR2022 Submission]

• Johannes Fett, Urs Kober, Christian Schwarz, Dirk Habich, Wolfgang Lehner: "Accelerating Parallel Operation for Compacting Selected Elements on GPUs" (Euro-Par 2022)

• Ali Mohammed, Jonas H. Müller Kornörfer, Ahmed Eleliemy, Florina M. Ciorba: “Automated Scheduling Algorithm Selection and Chunk Parameter Calculation in OpenMP” (IEEE Transactions on Parallel and Distributed Systems)
• Benson Lawrence, Papke Leon, Rabl Tilmann: “PerMA-Bench: Benchmarking Persistent Memory Access” (Proceedings of the Very Large Data Base Endowment (VLDB) Endowment)
• Andreas Laber, Martin Gebser, Konstantin Schekotihin, Yao Yang: “Predicting Ion Beam Tuning in Semiconductor Manufacturing” (IEEE Electron Devices Society)
• Robert Bayer, Jon Voigt Tøttrup, and Pınar Tözün: “TPCx-AI on NVIDIA Jetsons” (Proceedings of the Fourteenth TPC Technology Conference on Performance Evaluation & Benchmarking)
• Chloe Averti, Vasileios Karakostas, Nikhita Kunati, Georgios Goumas, Michael Swif: “DaxVM: Stressing the Limits of Memory as a File Interface”(MICRO 2022 – 55th IEEE/ACM International Synopsium on Microarchitecture)
• Jonas H. Müller Korndörfer, Ahmed Eleliemy, Ali Mohammed, Florina M. Ciorba: “LB4OMP: A Dynamic Load Balancing Library for Multithreaded Applications” (IEEE Transactions on Parallel and Distributed Systems, Vol. 33, April 2022)
• Nils Strassenburg, Ilin Tolovski, Tilmann Rabl: “Efficiently Managing Deep Learning Models in a Distributed Environment” (25th International Conference on Extending Database Technology (EDBT))
• Tobias Maltenberger, Till Lehmann, Lawrence Benson, Tilmann Rabl: “Evaluating In-Memory Hash Joins on Persistent Memory” (25th International Conference on Extending Database Technology (EDBT))
• Lawrence Benson, Tilmann Rabl: “Darwin: Scale-In Stream Processing” (Conference on Innovative Data Systems Research, CIDR 22)
• Tobias Maltenberger, Ivan Ilic, Ilin Tolovski, Tilmann Rabl: “Evaluating Multi-GPU Sorting with Modern Interconnects” (Proceedings of the 2022 International Conference on Management of Data (SIGMOD ’22))
• Mikkel Møller Andersen, Pınar Tözün: “Micro-architectural Analysis of a Learned Index” (Proceedings of the International Workshop on Exploiting Artificial Intelligence Techniques for Data Management)
• Utku Sirin, Pınar Tözün, Danica Porobic, Ahmad Yasin, Anastasia Ailamaki: “Micro-architectural analysis of in-memory OLTP: Revisited” (Springer, The VLDB Journal – The International Journal on Very Large Data Bases)
• Simon Lund, Philippe Bonnet, Klaus Jensen, Javier Gonzalez: “I/O Interface Independence with xNVMe” (Proceedings of the 15th ACM International Systems and Storage Conference)
• Aleš Zamuda: “Speeding up Vectorized Benchmarking of Optimization Algorithms” (Austrian-Slovenian HPC Meeting 2022 – ASHPC)
• Andreas Laber, Martin Gebser, Konstantin Schekotihin, Yao Yang: “Predicting Ion Beam Tuning in Semiconductor Manufacturing” (IEEE Electron Devices Society)

2021

• Xiao Xiang Zhu, Chunping Qiu, Jingliang Hu, Yilei Shi, Yuanyuan Wang, Michael Schmitta, Hannes Taubenböck: “The urban morphology on our planet – Global perspectives from space” (Remote Sensing of Environment, Elsevier Inc., 2021)
• Jonas H. Müller Kornörfer, Ahmed Eleliemy, Ali Mohammed, Florina M. Ciorba: “LB4OMP: A Dynamic Load Balancing Library for Multithreaded Applications” (IEEE Transactions on Parallel and Distributed Systems, 2021)
• Nataša Ošep Ferš, Aleš Zamuda: “Considering a Fear and Greed Index in Bitcoin Price Prediction Through Long Short-Term Memory”(Proceedings of the 30th International Electrotechnical and Computer Science Conference ERK, IEEE Slovenia Section, 2021)
• Ahmed Eleliemy, Florina M. Ciorba: “Don’t Compete, Let’s Cooperate: A Cooperative Scheduling Approach” (Platform for Advancing Scientific Computing Conference, 2021)
• Ali Mohammed, Ahmed Eleliemy, Jonas H. Müller Korndörfer, Rubén M. Cabezón, Florina M. Ciorba: “Single- and Two-Level Dynamic Load Balancing of Scientific Applications” (Platform for Advancing Scientific Computing Conference, 2021)
• Björn Daase, Lars Jonas Bollmeier, Lawrence Benson, Tilmann Rabl: “Maximizing Persistent Memory Bandwidth Utilization for OLAP Workloads” (International Conference on Management of Data, ACM SIGMOD/PODS, 2021)
• Alberto Lerner, Philippe Bonnet: “Not your Grandpa’s SSD: The Era of Co-Designed Storage Devices” (International Conference on Management of Data, ACM SIGMOD/PODS, 2021)
• Jiawei Jiang, Shaoduo Gan, Yue Liu, Fanlin Wang, Gustavo Alonso, Ana Klimovic, Ankit Singla, Wentao Wu, Ce Zhang: “Towards Demystifying Serverless Machine Learning Training” (International Conference on Management of Data, ACM SIGMOD/PODS, 2021)
• Aleš Zamuda: “Parallelization of benchmarking using HPC: text summarization in natural language processing (NLP), glider piloting in deep-sea missions, and search algorithms in computational intelligence (CI)” (Austrian-Slovenian HPC Meeting 2021 – ASHPC21)
• Lawrence Benson, Hendrik Makait, Tilmann Rabl: “Viper: An Efficient Hybrid PMem-DRAM Key-Value Store” (Proceedings of the Very Large Data Base Endowment (VLDB) Endowment, Vol. 14, No. 9, 2021)
• Jaeyoung Do, Ivan Luiz Picoli, David Lomet, Philippe Bonnet: “Better Database Cost/Performance via Batched I/O on Programmable SSD” (Conference on Very Large Data Bases, VLDB, Journal, 2021)
• Shaoduo Gan, Xiangru Lian, Rui Wang, Jianbin Chang, Chengjun Liu, Hongmei Shi, Shengzhuo Zhang, Xianghong Li, Tengxu Sun, Jiawei Jiang, Binhang Yuan, Sen Yang, Ji Liu, Ce Zhang: “BAGUA: Scaling up Distributed Learning with System Relaxations” (PVLDB, 2021)
• Yang Li, Yu Shen, Wentao Zhang, Jiawei Jiang, Bolin Ding, Yaliang Li, Jingren Zhou, Zhi Yang, Wentao Wu, Ce Zhang, Bin Cui: “VolcanoML: Speeding up End-to-End AutoML via Scalable Search Space Decomposition” (PVLDB, 2021)
• Ahmed Eleliemy, Florina M. Ciorba: “A Resourceful Coordination Approach for Multilevel Scheduling” (International Conference on High Performance Computing & Simulation, HPCS, 2021)
• Leonel Aguilar, David Dao, Shaoduo Gan, Nezihe Merve Gurel, Nora Hollenstein, Jiawei Jiang, Bojan Karlas, Thomas Lemmin, Tian Li, Yang Li, Susie Rao, Johannes Rausch, Cedric Renggli, Luka Riminik, Maurice Weber, Shuai Zhang, Zhikuan Zhao, Kevin Schawinski, Wentao Wu, Ce Zhang: “Ease.ML: A Lifecycle Management System for MLDev and MLOps” (Conference on Innovative Data Systems Research, CIDR, 2021)
• Maximilian Böther, Otto Kißig, Lawrence Benson, Tilmann Rabl: “Drop It In Like It’s Hot: An Analysis of Persistent Memory as a Drop-in Replacement for NVMe SSDs” (International Workshop on Data Management on New Hardware – DAMON’21)
• Nina Ihde, Paula Marten, Ahmed Eleliemy, Gabrielle Poerwawinata, Pedro Silva, Ilin Tolovski, Florina M. Ciorba, and Tilmann Rabl: “A Survey of Big Data, High Performance Computing, and Machine Learning Benchmarks” (Technology Conference on Performance Evaluation & Benchmarking, TPC, published by Springer, 2021)
  
• Miao Xupeng, Gürel Nezihe Merve, Ce Zhang, Wentao Han Zhichao, Li Bo, Min Wei, Rao Susie, Ren Hansheng, Shan Yinan, Shao Yingxia, Wang Yujie, Wu Fan, Xue Hui, Yang Yaming, Zhang Zitao, Zhao Yang, Zhang Shuai, Wang Yujing, Cui Bin: “DeGNN: Improving Graph Neural Networks with Graph Decomposition” (ACM – Association for Cumputer Machinery, Singapore)
• Rausch Johannes, Martinez Octavio, Bissig Fabian, Zhang Ce, Feuerriegel Stefan: “DocParser: Hierarchical Document Structure Parsing from Renderings” (Proceedings of the 27th ACM SIGKDD Conference on Knowledge Discovery & Data Mining (KDD ’21))

 

2020

• Li Peng, Rao Xi, Jennifer Blase, Xu Chu, Yue Zhang, Ce Zhang: “CleanML: A Study for Evaluating the Impact of Data Cleaning on ML Classification Tasks” (ETH Zurich, Institute for Computing Platforms)

 

Winter 2023/24

 D1.5 3rd Annual Project Report (WP1 /KNOW) [Report, Public]

In D1.5 DAPHNE project team describes the progress made from project month 25 to project month 36, respectively the work done in project year 3 (M25/Dec 2022 – M36/Nov 2023) regarding the strategic objectives and throughout all work packages.

D3.4 Compiler Design and Overview (WP3 / TUB) [Report, Public]

Previous deliverables already shared the overall and refined system architecture [D2.1, D2.2], the language design specification [D3.1], as well as the initial and extended compiler prototypes [D3.2, D3.3]. This document presents the DAPHNE compiler design and overview. The DAPHNE compiler is based on MLIR (multi-level intermediate representation) as a framework for domain-specific compilers to facilitate a cost-effective development of our domain-specific language, reuse of compiler infrastructure, and good extensibility. This document first provides the necessary background on MLIR.

D4.3 Improved DSL Runtime Prototype and Overview (WP4 / ICCS) [Report, Public]

In this deliverable, we describe the status of the DAPHNE runtime system and its prototype v2 implementation. Specifically, we overview the current system architecture and continue with the implementation and integration updates that took place within this reporting period. We can categorize progress made along the following axes: a) Advances in runtime I/O; b) updates in runtime communication and c) updates inside the execution engine itself. We provide access to the DAPHNE Runtime v2 prototype, publicly available in the DAPHNE development repository. We conclude this report by including examples on how to execute sample DSL algorithms with various parameters and provide a large set of benchmarking results of the current version over the VEGA supercomputer.

D5.3 Improved Prototype of Pipelines and Task Scheduling Mechanisms (WP5 / UNIBAS) [Demonstrator, Public]

This document describes the improved pipeline and task scheduling prototype implemented in the DAPHNE system. The information presented in this document is based on a snapshot of the DAPHNE system prototype that implements well-tested and verified scheduling strategies. The improved prototype of pipeline, task, and parameter server scheduling include usability improvements, the addition of automated scheduling to the DAPHNE scheduling framework (DAPHNEsched), the implementation of inter-node scheduling infrastructure, and parameter server updates.

D6.3 Prototype and Overview of Data Path Optimizations and Placement (WP6 / ITU) [Demonstrator, Public]

Report and prototype of used data path optimization techniques and automatic data placement in hybrid memory and storage configurations. This deliverable describes the second version of the demonstrator of the Delilah computational storage prototype. The report also describes data path optimizations and placement in the context of the DAPHNE storage subsystem, including hardware acceleration on the data path.

D7.3 Prototype and Overview Code Generation Framework (WP7 / TUD) [Demonstrator, Public]

As introduced in DAPHNE report D7.1 , the challenges for the integration of HW accelerators are (i) developing as well as generating operators – hereafter also called computation kernels or kernels for short – which can be efficiently executed on accelerators such as CPUs, GPUs or FPGAs, (ii) integrating these accelerator-specific operators in the whole DAPHNE compilation and runtime infrastructure in a seamless way, and (iii) selecting the bestfitting accelerator for efficient execution depending on the specific IDA pipeline and hardware environment [D7.1].

D8.2 Improved Pipelines all Use Case Studies (WP8 / KAI) [Report, Public]

The use case pipelines presented in the DAPHNE project are enhanced by utilizing the DAPHNE system infrastructure. Depending on the complexity of the initial pipeline description, the individual use cases either chose for implementing the pipeline in DSL or DaphneLib. The WP8 project partners contributed to the development of DAPHNE system infrastructure by providing constructive feedback in the form of GitHub issues as well as pull-requests to the source code repository.

Summer 2023

D3.3 Extended Compiler Prototype

Previous deliverables already shared the overall and refined system architecture [D2.1, D2.2] as well as the initial language and compiler designs [D3.1, D+22] and the initial compiler prototype [D3.2]. This document presents the extended DAPHNE compiler prototype, which is still based on MLIR (multi-level intermediate representation) as a library of compiler infrastructure to facilitate a cost-effective development of our domain-specific language, reuse of compiler infrastructure, and good extensibility.

D9.3 Initial Prototype of Benchmarking Toolkit

This deliverable describes the implementation of the Universal Machine Learning Analysis Utility (UMLAUT) prototype. We describe the implementation of our design decisions, the use cases for the system, as well as its performance implications on Integrated Data Analysis (IDA) pipelines.

Winter 2022/23

These deliverables have been submitted but are not yet accepted, they might be revised after the next review period.

D1.4 2^nd Annual Project Report

In D1.4 DAPHNE project team describe the progress made until project month 24 and here particularly the work done in project year 2. This report presents an overview of the type and purpose of the document, its revision history, the strategic objectives of DAPHNE project and the work carried out in project year 2 to reach these objectives.

D4.2 DSL Runtime Prototype

In this deliverable we demonstrate the use of the DAPHNE runtime by sharing a snapshot of the DAPHNE prototype, and provide an example scenario of running simple DaphneDSL scripts on the local runtime as well as on the distributed runtime.

D5.2 Prototype of Pipelines and Task Scheduling Mechanisms

This document describes the use of the pipeline and task scheduling mechanisms currently supported in the DAPHNE system. As discussed in previous deliverable reports [D4.1, D5.1], the DAPHNE project team continuously refines, extends, and adds scheduling mechanisms in DAPHNE. Nevertheless, extensibility is at the heart of the DAPHNE system.

D6.2 Prototype and Overview of Managed Storage Tiers and Near-Data Processing

This deliverable describes the design of the Delilah prototype for offloading eBPF code on a computational storage platform. We detail its implementation on the Daisy computational storage platform and discuss its initial performance evaluation.

Click here for direct access to download the demo

D7.2 Prototype and Overview HW Accelerator Support and Performance Models

This document describes a snapshot of our DAPHNE prototype regarding HW acceleration as a follow-up of deliverable D7.1. In particular, we introduce three example scenarios as the main drivers for the current prototype and describe how to execute these examples with enhanced hardware support.

D9.2 Initial Benchmark Concept and Definition

In D9.2, HPI presents the initial concept and definition of the benchmark for the DAPHNE system.

Summer 2022

D2.2 Refined System Architecture

D2.2 is based on D2.1 Initial System Architecture (see below) and illustrated how this initial system architecture is retained. On top of that we have integrated earlier lessons learned and provide more details on several components.

D7.1 Design of integration HW accelerators

In D7.1, the Daphne project team reports on the planned overall design of integration HW accelerators as well as details on accelerated operations and primitives, as well as its compiler and runtime support.

Winter 2021/2022

D1.3 First Annual Project Report

This report summarizes the work carried out throughout the first year of the Daphne project, as well as the progress and initial results obtained so far. In detail, we share the overall work and progress towards the objectives, status of groups of work packages, and impact.
Additionally, this report also includes an update of the exploitation and dissemination plan, as well as the research data management plan.

D3.1 Language Design Specification

This report on the language design specification summarizes the design of DAPHNE’s domain-specific language (DSL) and related user-facing application programming interfaces (APIs).

D3.2 Compiler Prototype

This document shares a snapshot of this prototype, and describes an example scenario of running regression (and similarly classification, clustering, dimensionality reduction, and graph processing) algorithms on real datasets. The initial open source release of the DAPHNE prototype system is planned for end of March 2022.

D4.1 DSL Runtime Design

In this report the initial design of the Daphne runtime system and its prototype implementation are addressed. Moreover, the support for distribution primitives and the integration with existing frameworks are outlined.

D5.1 Scheduler Design for Pipelines and Tasks

This report describes the Daphne system based scheduling context and decisions as well as the preliminary design of the Daphne scheduler for pipelines and tasks.

D6.1 Computational Storage Capabilities

This report explains how compute and storage interact within storage devices and across a cluster, examining  the recent evolutions in storage architectures and programming abstractions.

Summer 2021

D2.1 Initial System Architecture

This report on the initial system architecture summarizes the preliminary design of the Daphne system infrastructure.

D8.1 Initial Pipeline Definition of all Use Cases

This report describes the five use case pipelines of earth observation, semiconductor manufacturing, material degradation and automotive vehicle development, whereas one is focussing on ejector geometry observation and the latter on virtual prototype development.